1. Field of the Invention
The present invention relates to an electron emission device. More particularly, the present invention relates to an electron emission device that can suppress signal distortion by reducing the parasitic capacitance generated between cathode and gate electrodes while maintaining the emission property of an electron emission region, a method of manufacturing the electron emission device and an electron emission display using the electron emission device.
2. Description of the Related Art
Generally, electron emission elements are classified into those using hot cathodes as an electron emission source and those using cold cathodes as the electron emission source. There are several types of cold cathode electron emission elements, including Field Emitter Array (FEA) elements, Surface-Conduction Emitter (SCE) elements, Metal-Insulator-Metal (MIM) elements and Metal-Insulator-Semiconductor (MIS) elements.
The electron emission elements may be arrayed on a substrate to form an electron emission device. The electron emission device may be associated with another substrate, on which a light emission unit having a phosphor layer, a black layer and an anode electrode are formed to make an electron emission display.
A FEA element may include electron emission regions and a pair of driving electrodes. The electron emission regions may be formed of a material having a relatively low work function or a relatively large aspect ratio, such as a carbonaceous material or a nanometer-size material, so that electrons can be effectively emitted when an electric field is applied thereto under a vacuum state.
A typical electron emission device using FEA elements includes a substrate on which cathode electrodes, an insulating layer and gate electrodes are successively formed. Openings may be formed through the gate electrodes and insulating layer at crossed regions of the cathode and gate electrodes, thereby partly exposing the surfaces of the cathode electrodes. The electron emission regions are formed on the cathode electrodes in positions corresponding to the openings.
A scan signal voltage is applied to one of the cathode and gate electrodes and a data signal voltage is applied to the other of the cathode and gate electrodes. When the scan and data signal voltages are applied, an electric field is formed around an electron emission region of a pixel, and where a voltage difference between the cathode and gate electrodes is higher than a threshold value, electrons are emitted from the electron emission region.
With the above-described structure, the cathode electrodes and the gate electrodes intersect each other with an insulating layer interposed therebetween. The insulating layer is generally formed of a material having a dielectric constant of about twelve. Therefore, relatively high parasitic capacitance is generated at the crossed regions of the cathode and gate electrodes.
Thus, when the electron emission display is driven by the driving signals applied to the cathode and gate electrodes, signal distortion, e.g., retardation of the driving signal, may occur due to the parasitic capacitance. Under certain circumstance, gray scale display may not be realized.
The openings in the insulating layer are formed through a wet etching process. However, due to the inherent isotropic etching property of the wet etching process, a width of the opening is gradually enlarged as the etching process progresses. Thus, when the insulating layer has the same etch characteristics therethrough, the openings are narrower at the bottom than at the top thereof. Therefore, a distance between the electron emission region and the gate electrode increases. This increased distance reduces the intensity of the electric field formed around the electron emission region, thereby deteriorating the emission property of the electron emission region.
In order to reduce the distance between the electron emission regions and the gate electrodes, a thickness of the insulating layer must be reduced. However, when the thickness of the insulating layer is reduced, the parasitic capacitance at the crossed regions further increases. Moreover, since the electron emission regions are easily affected by the anode electrodes, a diode emission phenomenon where electrons are emitted by the anode voltage may occur.